1. Field of the Invention
The present invention relates to a semiconductor device comprising a transistor pair isolated by trench isolation, and more particularly to a semiconductor device which has a layout pattern with better relative accuracy of the transistor pair in circuits for which symmetry or relativity is important.
2. Description of the Related Art
In recent semiconductor integrated circuit devices where the degree of integration is increasing, trench isolation, which can decrease the transistor size and the distance between components, is used. Trench isolation is generally called “shallow trench isolation” (STI), which is created by forming a shallow trench in the isolation area of a silicon semiconductor substrate, forming such an insulation film as a silicon oxide film on the entire surface, removing the insulation film on the surface by a chemical or mechanical polishing method, and allowing the insulation film in the trench to remain. STI is stated in Japanese Patent Application Laid-Open No. 11-297986 (FIG. 6, paragraph [0003]), for example. On the other hand, the current mirror circuit and the differential circuit in the digital analog converter (DAC) and the differential amplification circuit are circuits that include transistor pairs which require relative current characteristics. This transistor pair has a same gate width (channel width) to flow the same current, and can flow current with a predetermined ratio by setting the gate widths to be the predetermined ratio.